RFIC公司
电气工程
相位噪声
移相模块
噪声系数
压控振荡器
CMOS芯片
dBc公司
工程类
拓扑(电路)
电子工程
物理
放大器
插入损耗
电压
作者
E. Cohen,Mark N. Ruberto,Moshik Cohen,Ofir Degani,Shmuel Ravid,D. Ritter
标识
DOI:10.1109/tmtt.2013.2243749
摘要
Fully integrated 32-element symmetrical TX/RX 60-GHz RF integrated circuit (RFIC) with built-in self-test is presented. The RF bidirectional power-combining architecture with shared blocks and less than 1-dB millimeter-wave transmit/receive (T/R) switch loss achieves record size and power consumption. The RFIC features an 8-dB noise figure and - 28-dBm IP1 dB in RX mode, 10-dB power gain, and P sat of +3.5 dBm per chain in TX mode. Further included are a 2-bit phase shifter, an IF converter to/from 12 GHz, and an integrated frac- N synthesizer with push-push voltage-controlled oscillator having a-93 dBc@1-MHz phase noise at 48-GHz local oscillator port. A novel high dynamic range phase and power detector is presented with 2° and ±1-dB accuracy over PVT in phase and power. A detailed analysis of both phase quantization and power distribution is presented. Array impairments such as mismatch and coupling were compared for different topologies. The RFIC is packaged on alumina for testing and on low-temperature co-fired ceramic (LTCC) for antenna integration. The 6 × 6 patch antenna on LTCC including four dummies achieves a gain of 19 dBi with scanning of ± 30°. The total root mean square amplitude and phase error of the array is 0.8 dB and 6 ° , respectively, resulting in a maximum array beam degradation of 1.4 dB for 2-bit quantization. The RFIC area is 29 mm 2 and it consumes 1.2 W/0.85 W at TX/RX, with a 29-dBm effective isotropic radiated power at -19-dB error vector magnitude.
科研通智能强力驱动
Strongly Powered by AbleSci AI