A Novel Architecture for On-Device AI in Mobile Application with Enhanced Heat Dissipation

Silicon node scaling and continuous integration of On-Device AI in mobile device are driving demand for highcapacity memory and high-performance Application Processor (AP). However, for mobile AP with the latest Gate-All-Around (GAA) technology, conventional Package on Package (POP) structure, where memory package is stacked on top of AP package, face challenges to implement optimal performance of the advanced node. To address this, Samsung proposes a novel package platform based on Fan-Out Wafer Level Package (FOWLP) technology, which is the world's first asymmetric heterogeneous integration of memory and Heat Path Block (HPB) on top of a limited area AP Package. This innovative and unprecedented structure is possible because double-sided RDLs technology, unique to Samsung's mobile AP packages since '24, provides design flexibility for strategic placement of memory and HPB. Stress on thin RDL coming from memory packages, HPB, and AP Chip is optimized through Finite Element Analysis (FEA) and in-house simulation tool, after TV evaluation, vulnerable design is optimized. Package warpage, one of the top challenges, is addressed through redefining every element of the POP such as dimension, layout of memory and HPB, and each material, and so on. This revolutionary architecture has passed Package Level Reliability (PLR) and Board Level Reliability (BLR) reliability tests to prove its mechanical and electrical reliability. By repositioning of memory and adding HPB, the new package shows more than 20% improvement of thermal resistance in both simulation and Thermal Test Vehicle (TTV). The correlation of the thermal analysis and TTV at mobile Set environment is also verified. This disruptive change in mobile devices is expected to take advanced package technology to the next level and become a new breakthrough in the upcoming new AI Era.