An investigation of the thermal stability of the interfacial oxide in polycrystalline silicon emitter bipolar transistors by comparing device results with high-resolution electron microscopy observations

A comparison is made between the results of high-resolution electron microscope observations and the electrical characteristics of polycrystalline silicon emitter bipolar transistors. Devices are fabricated with and without a deliberately grown interfacial oxide layer, and the thermal stability of this oxide layer is investigated by carrying out a preanneal at temperatures between 800 and 1100 °C after polysilicon deposition, but prior to emitter implant and 900 °C drive-in. The electron microscope observations show that the deliberately grown interfacial oxide is of uniform thickness ∼14 Å, but breaks up when annealed at ∼950 °C and above, with ‘‘balling-up’’ occurring at ∼1100 °C. This correlates with a transistor gain that decreases from ∼1400 to ∼40. The electron microscopy also shows that a thin interfacial oxide layer is present even when not deliberately grown. This oxide breaks up when annealed at ∼900 °C and above, with ‘‘balling-up’’ occurring at ∼1000 °C. This correlates with a transistor gain that decreases from ∼240 to ∼50. Calculations of the effect that such interfacial oxide layers will have on the characteristics of polysilicon emitter bipolar transistors are made, and these predictions correlate well with the measured characteristics.