3-pitch cDBO a novel overlay mark with process robustness for advanced logic devices

As logic device scaling advances with the widespread adoption of extreme ultraviolet (EUV) lithography, overlay control has become increasingly sensitive to process-induced variations and wafer-level non-uniformities. Diffraction-based overlay (DBO) is widely used for critical layers in advanced logic manufacturing due to its high precision and throughput; however, conventional continuous DBO (cDBO) structures remain susceptible to variations in grating pitch and critical dimension, particularly at the wafer edge. In this work, a three-pitch continuous DBO (3P cDBO) structure is proposed to improve overlay robustness without increasing measurement footprint or analysis complexity. The proposed design fixes the bottom grating pitch while applying two different top grating pitches, enabling two independent phase signals referenced to a common bottom grating. This structure effectively suppresses common-mode process variations. Four overlay key types—conventional cDBO and 3P cDBO with two independent design conditions—were evaluated on an advanced logic layer using an ASML YieldStar system. Experimental results show that 3P cDBO achieves lower average residuals and, critically, eliminates wafer-edge residual outliers observed in conventional cDBO after EUV OVO2-based polynomial correction. Furthermore, mis-reading correction (MRC) analysis using post-etch on-cell overlay measurements demonstrates a 20–30% improvement in process correlation for 3P cDBO. These results indicate that three-pitch cDBO provides a robust and practical overlay measurement solution for EUV-based advanced logic processes.