材料科学
薄膜晶体管
光电子学
晶体管
半导体
氧化物
薄膜
阈值电压
作者
Yuhang Sun,Junkyu Kim,Neel Chatterjee,Sarah L. Swisher
标识
DOI:10.1002/aelm.202001037
摘要
Abstract In metal‐oxide thin‐film transistors (TFTs), high‐ k gate dielectrics often yield a higher electron mobility than SiO 2 . However, investigations regarding the mechanism of this high‐ k “mobility boost” are relatively scarce. To explore this phenomenon, solution‐processed In 2 O 3 TFTs are fabricated using eight different gate dielectrics (SiO 2 , Al 2 O 3 , ZrO 2 , HfO 2 , and bilayer SiO 2 /high‐ k structures). With these structures, the total gate capacitance can be varied independently from the semiconductor–dielectric interface to study this mobility enhancement. It is shown that the mobility enhancement is a combination of the effects of areal gate capacitance and interface quality for disordered oxide semiconductor devices. The ZrO 2 ‐gated TFTs achieve the highest mobility by inducing more accumulation charge with higher gate capacitance. Surprisingly, however, when the gate capacitance is held constant, no mobility enhancement is observed with the high‐ k gate dielectrics compared to SiO 2 .
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