A 14-Bit 250-KS/s Calibration-Free SAR ADC for the Detection of Physiological Electrical Signals in Consumer Electronics

This paper presents a 14-bit 250-KS/s R-C hybrid calibration-free SAR ADC for the detection of physiological electrical signals in consumer electronics. This design adopts a switching scheme to control the resistive DAC (RDAC) and capacitive DAC (CDAC) to avoid the variation of the common-mode voltage. A redundant capacitance is introduced in the CDAC to suppress insufficient signal establishment during inter-stage conversion. The proposed hybrid R-C architecture in this paper can greatly reduce the matching requirement for resistive and capacitive elements while simultaneously addressing the contradiction between the conversion speed and accuracy. With the Nyquist rate input, the post-simulation results show that the effective number of bits (ENOB) is 12.65 bits, the DNL is -0.68/0.8 LSB, and the INL is -1.4/0.84 LSB.