Improving the Reliability of Organic Logic Circuits via Asymmetric Dual‐Gate Strategy

Abstract The reliability of organic logic circuits is a key issue in advancing the multifunctional applications of organic field‐effect transistors (OFETs). With the integrated and aggressively downscaled devices, the high off‐state leakage current of the device impedes the reliable logic functionality of organic logic circuits. Herein, an asymmetric dual‐gate strategy is utilized to effectively suppress the off‐state leakage current of the OFET in logic circuits. Unlike the conventional dual‐gate structures, the assist gate in the asymmetric dual‐gate independently modulates the parasitic leakage current without affecting the on‐state current of OFETs. The subthreshold swing ( SS ) of 2,9‐didecyldinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene (C 10 ‐DNTT) FET is decreased from 245 to 64 mV dec −1 , nearly approaching the room temperature theoretical limit, and the average current on/off ratio is increased from ≈10 4 to 10 7 . Benefiting from the modulation of the asymmetric dual‐gate strategy, key logic operations such as inverter, NOR gate, and NAND gate are reliably manufactured in organic circuits. Simultaneously, the zero‐ V GS inverter logic circuit exhibits a decreased power consumption from 14.2 to 0.7 pW µm −1 . This work eliminates the effect of off‐state leakage current through asymmetric dual‐gate strategy and provides an effective approach to enhance the reliability of organic logic circuits.