Investigation of the Influence of Neutron Irradiation on the Fault Tolerance of a Microcircuit

Reducing transistor size leads to an increase in the sensitivity to single event upsets (SEU) for CMOS integrated circuits designed for operation in irradiated conditions. Ionization energy losses for neutrons in the range 1–14 MeV is calculated based on the calculated spectra of primary knock-on silicon atoms. CMOS SRAM chips susceptibility to SEU under irradiation is estimated for various circuit topological sizes.