神经形态工程学
材料科学
功能(生物学)
计算机体系结构
高效能源利用
计算科学
计算机科学
纳米技术
人工神经网络
人工智能
电气工程
工程类
生物
进化生物学
作者
Jiachao Zhou,Xinwei Zhang,Yishu Zhang,Shaohan Huang,Anzhe Chen,Zhihao Gong,Zongwen Li,Lin Wang,Fei Xue,Hua Wang,Jiayang Hu,Hanxi Li,Yang Xu,Kian Ping Loh,Bin Yu
标识
DOI:10.1002/adfm.202503452
摘要
Abstract Achieving brain‐level efficiency has long been the ultimate goal of computing. Considerable progress has been made in developing low‐power neuromorphic building blocks to enable efficient neural network training. However, ultra‐scalable nanodevices used for DropConnect regularization are demanded for full‐hardware implementation of deep neural networks (DNNs). In this work, an energy‐efficient ferroelectric synaptic transistor integrated with a threshold switch (TS) is presented, providing the proof‐of‐concept demonstration of hardware‐implemented stochastic DropConnect function. The threshold switch enables stochastic dropout of synaptic weights by leveraging intrinsic variations that are difficult to eliminate, while unselected TS helps to minimize sneak‐path currents. Compared to TS‐free arrays, this approach reduces energy consumption by 31.7%. Further, two types of DNNs to show that the DropConnect can effectively combat the overfitting issue under different network architectures is explored. The research showcases a viable solution for the hardware implementation of scalable, resource‐efficient DNNs.
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