Low-temperature processes for passivation and metallization of high-efficiency crystalline silicon solar cells

This paper reviews recent progress made at CSEM on the development of low-temperature processes for the fabrication of amorphous silicon-based passivated contacts and for the metallization of high-efficiency silicon heterojunction (SHJ) solar cells. Intrinsic a-Si:H passivation layers were optimized by trying to minimize the drop in lifetime usually observed after the deposition of the p-doped a-Si:H layer on top. State-of-the-art passivation levels are obtained, demonstrated by minority carrier lifetimes above 50 ms on lowly doped wafers, and close to 18 ms on actual SHJ cell precursors with buffer layers as thin as 4 nm. Regarding cell metallization, the screen-printing process of low-temperature Ag pastes has been optimized, resulting in finger width as low as 16 µm. Alternatively, a photolithography-free copper electroplating process has been developed. Using inkjet printing of hotmelt for patterning, 25-µm-wide and highly conductive fingers can be deposited. This process was tested in SHJ cell pilot production conditions, showing high cell performance (22.3% median efficiency) and good reproducibility. Finally, using the developed passivated contacts and screen-printing process, SHJ solar cells fabricated with industry-compatible processes showed efficiencies up to 23.1% on large-area devices and up to 23.9% on 4 cm2 devices.