放大器
总谐波失真
数学
电容器
拓扑(电路)
电气工程
功率(物理)
组合数学
物理
CMOS芯片
工程类
量子力学
电压
作者
Atsushi Matamura,Naoaki Nishimura,Preston Birdsong,Abhishek Bandyopadhyay,Adam Spirer,Mariana Markova,Shaolong Liu
出处
期刊:IEEE Journal of Solid-state Circuits
[Institute of Electrical and Electronics Engineers]
日期:2021-12-01
卷期号:56 (12): 3573-3582
被引量:2
标识
DOI:10.1109/jssc.2021.3100548
摘要
A low-power 113-dB SNR, −93-dB total harmonic distortion (THD)+N, digital input $\Delta \Sigma $ -based filter-less Class-D amplifier for wireless headphone applications is presented. This performance is achieved by the following architecture improvements: 1) variable-frequency- $\Delta \Sigma $ Class-D with digital feed-forward and switching-frequency reduction, 2) common-mode-stabilized power stage, 3) current digital-to-analog converter direct drive, and 4) rotational first-order dynamic-element-matching techniques. It operates on a single 1.8-V power supply with no external passive components except for a supply decoupling capacitor. The Class-D headphone amplifier achieves 82-mW non-clipping output power with 93% efficiency at a 16- $\Omega $ and 33- $\mu \text{H}$ load condition. The complete system was fabricated in a 40-nm CMOS process and occupies 1.33-mm 2 die area.
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