IEEE 1988 Bipolar Circuits E Technology Meeting TWO DIMENSIONAL QUANTITATIVE STUDY OF THE PERFORMANCE OF LOW TEMPERATURE EFITAXIAL SILICON EMITTER BIPOLAR TRANSISTORS WITH SIDE-WALL SPACER

Kapeldreef 75, Abstract: Detailed two dimensional simulations are carried out on side-wall spacer self aligned 1) polysilicon emitter bipolar transistor and 2) low temperature epitaxial emitter bipolar tran- sistor. We show that the lateral extrinsic base to intrinsic base encroachment is improved in the epitaxial emitter transistor re- sulting in reduced peripheral punchthrough currents. Also, the maximum surface electric field is strongly reduced in the epi- taxial emitter structure resulting in smaller tunnelin currents. Finally, the calculated transient delay is shorter for the epitaxial emitter transistor than for the polysilicon emitter transistor.