FPGA-based path planning using improved Ant Colony Optimization Algorithm

This paper develops a novel path planning algorithm using improved ant colony optimization (ACO) and its FPGA implementation. The proposed approach can effectively increase the accuracy to generate an optimal path. The main idea of this paper is to avoid local minimum by continuous tuning of a setting parameter and the establishment of new mechanisms for opposite pheromone updating and partial pheromone updating. Experimental results show that the execution efficiency of path planning is significantly improved by full hardware design for embedded applications.