16.1 A 265μW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS

The demand for highly energy-efficient circuits and systems has exponentially increased for Systems on Chip (SoC). A fractional-N phase-locked loop (PLL) is one of the most important building blocks in SoCs for a variety of applications, such as frequency synthesis for wireless transceivers and system clock generation for processors, memories, and I/O interfaces. Recent developments in fractional-N digital PLLs (DPLLs) [1]-[3] have shown great potential for achieving low-power operation and small chip area. However, none of these works have achieved power consumption below 500 μW due to the number of building blocks operating at the oscillator frequency. Furthermore, the digitally controlled oscillators (DCOs) in [1]-[3] consume more than 250 μW of power to achieve a good phase noise and a high-enough amplitude for DPLL locking. A digital sub-sampling architecture [1], [2], [4] can potentially reduce the overall power consumption by bypassing these high-frequency building blocks. Unfortunately, the absence of frequency acquisition makes such architecture vulnerable to sudden or large frequency disturbances. Even though a background frequency-locked loop (FLL) [1], [4] can be applied, it consumes large power due to the counter working at the DCO frequency. The typical solution to save power consumption is to turn off the FLL [2] after the PLL has been stabilized. Despite the benefit of the power reduction, a sub-sampling PLL has multiple frequency lock-in ranges near the integer multiple of the reference frequency, which could cause false locking if the frequency disturbances are within those ranges. To address the above issues, this work presents a fractional-N DPLL achieving a 265 μW power consumption with robust phase and frequency acquisition with negligible power overhead in a 65nm CMOS technology. It also achieves an rms jitter of 2.8ps, which corresponds to an FoM of-236.8dB.