可靠性(半导体)
铜
建筑
可靠性工程
电子包装
集成电路封装
计算机科学
材料科学
工程类
电子工程
光电子学
物理
集成电路
冶金
热力学
艺术
视觉艺术
功率(物理)
作者
Jui‐Chang Chuang,Chang‐Chun Lee
标识
DOI:10.1115/imece2024-143446
摘要
Abstract This study offers an insight into copper interconnects subjected to diverse physical loading conditions associated with the thermal, electrical, and mechanical domains. In order to estimate primary contributions among stress, temperature and electrical effects, a novel specimen has been designed to analyze the influence under multiple loading through images of distinct failure defects in this study. Three geometric variations in line widths for copper interconnects have been designed, specifically 15 μm, 10 μm, and 5 μm. This research examines the reliability physics of copper interconnects in advanced packaging architectures, assessing the effects of electromigration (EM), electromigration combined with thermomigration (TM), and stress migration (SM), alongside three distinct physical loading scenarios. The analytic results indicated that electrical resistance of copper interconnection is increased rapidly with reliability physics especially temperature condition. Copper interconnects with a width of 5 μm exhibit a 19.32% increase in electrical resistance under combined EM and TM effects, relative to solely EM effect. This experiment provides a method to estimate electrical resistance change under various reliability physics loading for advanced packaging structures featuring diverse copper interconnection design.
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