Pushing multiple patterning in sub-10nm

Due to elongated delay of extreme ultraviolet lithography (EUVL), the semiconductor industry has been pushing the 193nm immersion lithopgrahy using multiple patterning to print critical features in 22nm/14nm technology nodes and beyond. Multiple patterning lithography (MPL) poses many new challenges to both mask design and IC physical design. The mask layout decomposition problem has been extensively studied, first on double patterning, then on triple or even quadruple patterning. Meanwhile, many studies have shown that it is very important to consider MPL implications at early physical design stages so that the overall design and manufacturing closure can be reached. In this paper, we provide a comprehensive overview on the state-of-the-art research results for MPL, from synergistic mask synthesis to physical design. We will also discuss the open problems as to pushing multiple patterning in sub-10nm.