从头算
量子隧道
MOSFET
物理
电气工程
材料科学
拓扑(电路)
凝聚态物理
晶体管
量子力学
数学
组合数学
工程类
电压
作者
Tom Jiao,Edwin Antunez,Hiu Yung Wong
标识
DOI:10.1109/led.2023.3310511
摘要
The abnormal subthreshold swing (SS) in Silicon Metal-Oxide Semiconductor Field Effect Transistor (MOSFET) at cryogenic temperature is commonly attributed to band tail (BT) conduction. The cryogenic SS does not scale with the temperature, T, for T $ < 50\text{K}$ and it is observed to saturate at 10mV/dec ~ 20mV/dec at low T in most experiments. Hitherto, only analytical studies have been conducted for BT and its properties. It is not clear how much of its effect can be eliminated should there be an ideal manufacturing technology. In this letter, by using robust ab initio calculation with quantum transport, we have successfully calculated the BT in a Si nanowire (NW) and studied its characteristic length. By analyzing the transport properties of the NW with various gate lengths, $\text{L}_{{\text {G}}}$ , at various temperatures, it is observed that for $\text{L}_{{\text {G}}} < 20$ nm, the tunneling current dominates, and for $\text{L}_{{\text {G}}}>$ 20nm, the BT current dominates at 3K. It is found that, in a perfect nanowire (as a gedanken experimental device), an SS as low as 1.4mV/dec can be achieved at 3K for 15 orders of magnitudes of current change with a minimum of 0.42mV/dec ( $\text{L}_{{\text {G}}}$ = 50nm). This also justifies the results in a recent experiment in which a very low SS (3.4mV/dec at 5.5K) was obtained. Moreover, it is also shown that for the 2nm node ( $\text{L}_{{\text {G}}}~\sim $ 15nm), direct S/D tunneling will set the ultimate limit of SS at 3K.
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