A 134-μW 50-MHz Quasi-Dynamic Comparator with A Novel Clock-Free Regenerative Latch

Comparators are extensively used in switched-mode systems, including dc-dc converters, class $\mathrm{D}$ amplifiers, and supply modulators, where they serve as integral components for pulse-width modulation (PWM) operation. Traditionally, static comparators are employed in such systems; however, the increasing trend of high PWM switching-frequencies (>10 MHz or equivalently, <100 ns period) renders these comparators increasingly unsuitable. This is because the high-speed operation imposes the comparator to use high biasing-currents that, in turn, lead to high power-dissipation and the consequent undesirable degradation of power efficiency [1], [2]. On the other hand, dynamic (clocked) comparators may achieve lower power-dissipation at high speed, but their output is discontinuous due to the clocked operation. They are therefore incongruous for generating PWM pulses that must continuously correspond to the comparator input signals. In short, there is a need for low-power comparators that are suitable for high-frequency PWM operation in switched-mode systems.