Improving the die utilization and lifetime in a multi-die SiC power module by means of integrated per-die gate buffers

The full utilization of the active devices within a SiC power module can be limited by the common stray inductive path imposed by the substrate layout. In this paper, the prospect of integrating individual gate bulfers per power die is explored for lowering the total losses of a power module, while maintaining a good thermal distribution across the set of dies. Each die within the power module has an increased utilization due not only having lowered losses, but due to the similar source inductive path for die, similar thermal loading. Using a 50kVA, 1.2kV, 8-die prototype power module, the overall switching losses using per-die bulfers is found to be reduced by a factor of 25%, while significantly improving the thermal distribution from die to die.