Communication—Effect of a Self-Limited Reset Operation on the Reset Breakdown Characteristics of a Monolithically Integrated 1T1R RRAM

The reset breakdown of resistive random access memory (RRAM) significantly degrades device endurance. We suppressed reset breakdown by optimizing the reset operation in an HfO 2 -based 1T1R RRAM device. The effective gate-to-source voltage V GS eff is reduced by increasing the RRAM resistance during the reset operation. By applying the optimum V GS, we can both guarantee a sufficient reset current and suppress reset breakdown. The experimental results confirmed improved endurance characteristics without a degraded resistance ratio.