Dual-Mode Three-Way Doherty Power Amplifier With Extended High-Efficiency Range Against Load Mismatch

This article presents theoretical analysis and design methodology of a dual-mode three-way Doherty power amplifier (DPA) with an extended high-efficiency range and robust load mismatch adaptability. A nonlinear current model for active devices is established and employed to analyze the impact of load mismatches in the three-way DPA and a novel output combiner is proposed to minimize the mismatch impact by reconfiguring the gate bias conditions and setting distinct loads at the control port of the combiner. To validate the proposed DPA architecture and design approach, a prototype using commercial Gallium Nitride (GaN) transistors operated at the center frequency of 2.0 GHz was designed and fabricated. Under the ideal condition with a matched 50 $\Omega$ load, the fabricated DPA attains higher than 60% efficiency at 9 dB back-off. Through mode re-configuration, the proposed DPA presents 47.8%–56.7% back-off efficiency with less than 1.5 dB power fluctuation at 2:1 voltage standing wave ratio (VSWR) over 360 $^\circ$ phase span. When driven by a 80 MHz signal with 8 dB peak to average power ratio (PAPR), the DPA achieves 45.7%–52.2% average efficiency and better than $-$ 45 dBc adjacent channel power ratio (ACPR) with digital pre-distortion (DPD) under the load mismatch conditions.