单层
晶体管
材料科学
光电子学
纳米技术
计算机科学
工程类
电气工程
电压
作者
Xiaotian Sun,Shibo Fang,Ge Zhang,Linqiang Xu,Yee Sin Ang,Shujing Zhu,Qiang Li,Xingyue Yang,Zongmeng Yang,Junfeng Li,Weizhou Wang,Zhigang Song,Jing Lu
标识
DOI:10.1021/acsanm.5c01418
摘要
Motivated by realizing the excellent device performance of the 10 nm channel-length MoS2 field-effect transistors [ Nature Electronics 2024, 7, 545–556], we explore the device performance limit of the monolayer (ML) WS2 transistors in the sub-5 nm region through ab initio quantum transport simulations. We find that both the optimized n- and p-type ML WS2 metal oxide semiconductor field-effect transistors (MOSFETs) can satisfy the key performance metrics for high-performance applications of the International Technology Roadmap (ITRS) when the gate length is reduced to 3 nm. In addition, the performance of both the n- and p-type ML WS2 MOSFETs is better than that of the MoS2 counterparts for high-performance applications. Notably, at a gate length of 5 nm, the key performance metrics of high-performance and low-power ML WS2 devices show excellent n–p symmetry, indicating their potential for complementary metal oxide semiconductor (CMOS) applications. Our work indicates that the ML WS2 is a promising candidate as a channel material for prolonging Moore’s law in the future.
科研通智能强力驱动
Strongly Powered by AbleSci AI