计算机科学
记忆电阻器
神经形态工程学
电子工程
电容器
专用集成电路
拓扑(电路)
电气工程
计算机硬件
人工神经网络
工程类
人工智能
电压
作者
Pushkar Srivastava,R. K. Sharma,Rahul Kumar Gupta,Fırat Kaçar,Rajeev Kumar Ranjan
出处
期刊:IEEE Access
[Institute of Electrical and Electronics Engineers]
日期:2023-12-18
卷期号:12: 9195-9205
被引量:15
标识
DOI:10.1109/access.2023.3344311
摘要
A new proposition of passive (no external DC bias) memristor emulator (MRE) utilizing DTMOS technique which consists of four MOSFETs and a capacitor has been presented. The proposed MRE exhibits high operating frequency $(\sim 500~\mathrm {MHz})$ , zero static power and shows incremental behavior. The conventional mathematical equation of MRE has been derived considering the second-order effects of all the MOSFETs utilized. The proposed circuit has been simulated by the Cadence Virtuoso (IC617) spectre tool using $180 \mathrm {~nm}$ technology parameters. The layout occupies $1305 \mu \mathrm {m}^{2}$ area. The experimental verification has been carried out utilizing ALD1116 and ALD1117 dual N-channel and P-channel MOSFET arrays to demonstrate the practical viability. Finally, different possible applications namely; analog filters, oscillators (simple and chaotic), Schmitt trigger, Amoeba learning have been realized using proposed MRE to show its neuromorphic capability. Also, new logical AND & OR and NOT circuit configurations have been designed using proposed MRE.
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