Dissecting Parasitic Capacitance in Nanosheet FETs: An Analytical Perspective

This work presents an approach to extract and analytically model the parasitic capacitance components in Nanosheet FETs. Along with parallel and fringing components, the junction capacitance which is a significant contributor to the total parasitic capacitance is accurately modeled for the first time. The fringing parasitic capacitance components are modeled using the Elliptical Integral Method. The model uses only one fitting parameter and is accurate across the device structural variations with only ~1.2% error.