A Carrier-Based Two-Phase-Clamped DPWM Strategy With Zero-Sequence Voltage Injection for Three-Phase Quasi-Two-Stage Buck-Type Rectifiers

序列(生物学) 相(物质) 控制理论(社会学) 零(语言学) 电压 三相 阶段(地层学) 电子工程 拓扑(电路) 数学 计算机科学 物理 工程类 电气工程 控制(管理) 人工智能 化学 哲学 古生物学 生物 量子力学 生物化学 语言学
作者
Junzhong Xu,Thiago Batista Soeiro,Yang Wu,Fei Gao,Yong Wang,Houjun Tang,Pavol Bauer
出处
期刊:IEEE Transactions on Power Electronics [Institute of Electrical and Electronics Engineers]
卷期号:37 (5): 5196-5211 被引量:22
标识
DOI:10.1109/tpel.2021.3130677
摘要

A three-phase buck-type rectifier features a step-down ac–dc conversion function, which is considered as a prominent solution for electric vehicle chargers and telecommunication systems integrated to the grid above 380 V line to line. However, traditional solutions for those applications employ cascaded architectures with an ac–dc boost-type stage and a dc–dc buck-type stage, which may suffer from high switching losses and large dc-link capacitor volume. To relieve this issue, a straightforward carrier-based two-phase-clamped discontinuous pulsewidth modulation (DPWM) strategy with generalized zero-sequence voltage injection is proposed in this article for the commonly employed cascaded circuit. This method can stop the switching actions in the front-end stage during two-third of the grid period, which can yield to the best switching loss reduction. The operations of the front- and back-end converter stages become highly coupled to each other, which reduces the size requirement of the capacitor in the dc link. Therefore, the equivalent circuit behaves as a quasi-two-stage buck-type rectifier allowing an enhancement of the system power density by improving power conversion efficiency and by reducing the volume of passive components and heat sink. The proposed carrier-based two-phase-clamped DPWM strategy is described, analyzed, validated, and compared with different pulsewidth modulation methods on PLECS-based simulation and a 5-kW prototype.
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