逐次逼近ADC
有效位数
电子工程
噪声整形
计算机科学
放大器
噪音(视频)
电气工程
CMOS芯片
工程类
电容器
电压
人工智能
图像(数学)
作者
Ziqi Huang,Weilin Xu,Baolin Wei,Xueming Wei,Haiou Li
标识
DOI:10.1109/icetci57876.2023.10176463
摘要
The traditional passive noise-shaping SAR ADC has low power consumption but weak shaping capability; while the active noise-shaping SAR ADC has strong shaping capability but high-power consumption. The typical active-passive SAR ADC still consumes considerable power due to the use of OTA amplifier in the active part. In this paper, an active-passive noise-shaping SAR ADC is designed by using floating inversion amplifier (FIA) to replace the traditional OTA amplifier in the active part, which achieves a strong noise shaping capability and low power consumption at the same time. The second-order active-passive noise-shaping SAR ADC circuit designed by a 180nm CMOS process achieves 14.6-bit ENOB with 400KS/s sampling rate and consumes only 28.9µW.
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