光电探测器
压缩传感
计算机科学
帧(网络)
帧速率
光电子学
物理
计算机视觉
人工智能
电信
作者
Wen Pan,Zhaolong Yang,Zhibiao Hao,Changzheng Sun,Bing Xiong,Jian Wang,Yanjun Han,Hongtao Li,Lin Gan,Yi Luo,Lai Wang
标识
DOI:10.1109/jsen.2024.3506937
摘要
Modern imaging technology, by exposure and subsequent readout from image sensors, has limited the existing frame rate in real-time scenes. In this article, we present an architecture based on computing in sensor array that can achieve higher frame rates than conventional cameras. This approach fuses the architecture with neural network algorithms for compressed sensing and computational imaging. It achieves a mean squared error of $10^{-{2}}$ with fewer weights and sampling numbers (10%–40% of original data). It samples lower data to reconstruct images through fast recovery with an elapsed time of $100~\mu $ s. The feasibility has been verified through the encoded photodetector array chip consisting of $16\times 16$ dual-gate silicon photodiodes. This type of chips represents a highly promising technology for constructing image sensors that deliver high-speed imaging capability of >10000 frames/s, which may also show potential superiority in terms of noise resistance and dynamic range.
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