| 标题 |
Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs |
| 网址 | |
| DOI | |
| 其它 |
期刊:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 作者:Bon Woong Ku; Kyungwook Chang; Sung Kyu Lim 出版日期:2019-11-09 |
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(2025-6-4)