Wafer-scale transistor arrays fabricated using slot-die printing of molybdenum disulfide and sodium-embedded alumina

二硫化钼 材料科学 晶体管 薄脆饼 光电子学 薄膜晶体管 电介质 纳米技术 场效应晶体管 图层(电子) 电气工程 复合材料 工程类 电压
作者
Yonghyun Albert Kwon,Jihyun Kim,Sae Byeok Jo,Dong Gue Roe,Dongjoon Rhee,Younguk Song,Byoungwoo Kang,Dohun Kim,Jeongmin Kim,Dae Woo Kim,Moon Sung Kang,Joohoon Kang,Jeong Ho Cho
出处
期刊:Nature electronics [Nature Portfolio]
卷期号:6 (6): 443-450 被引量:68
标识
DOI:10.1038/s41928-023-00971-7
摘要

Two-dimensional materials made via solution processing could be used to create next-generation electronic devices at scale. However, existing solution processing methods typically have a trade-off between scalability and material quality, which makes them unsuitable for practical applications. Here we show that wafer-scale arrays of molybdenum-disulfide-based transistors can be fabricated using a commercial slot-die printing process. We create inks of molybdenum disulfide nanosheets and sodium-embedded alumina for printing of the semiconductor and gate dielectric layer, respectively. The transistors exhibit average charge carrier mobilities of 80.0 cm2 V−1 s−1 in field-effect transistor measurements and 132.9 cm2 V−1 s−1 in Hall measurements at room temperature. The high charge carrier mobility is attributed to the sodium-embedded alumina gate dielectric, which causes a band-like charge carrier transport in the molybdenum-disulfide-nanosheet-based thin-film networks. We use the transistors to create various logic gates, including NOT, NOR, NAND and static random-access memory. Arrays of thin-film transistors can be fabricated on the 5-inch wafer scale using solution-based processing of molybdenum disulfide and sodium-embedded alumina inks for the semiconductor and gate dielectric, respectively, yielding devices with room-temperature mobilities of up to 80 cm2 V−1 s−1.
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