Quantitative metrology for anti-spacer patterning process development

In the semiconductor industry, with the requirement of critical dimension (CD) shrinkage and the limitation of single patterning, alternative patterning solutions are explored to continue enable device scaling. Previously we presented the anti-spacer technology by using 193nm immersion anti-spacer process with litho-freeze-litho-etch (LFLE) to enable the formation of sub-20nm contact features. During the process development and qualification, the existing CD scanning electron microscope (CDSEM) measurements show some limitations due to large process defects count in the early stages. More importantly, the pattern shift in the anti-spacer patterning process cannot be measured robustly through CDSEM. In this presentation, we will discuss a flow by using Calibre tools to measure and quantify the process development. First, we use CDSEMs to collect images from wafers, including both litho and etch processes. Then the SEM contour is extracted from images and the image distortion are corrected. The random process defects are classified, and the only systematic defects related to the process, such as micro-bridge or pinch, are counted. CD and pattern shift values are measured on the SEM contours. We also investigate the two different CDSEM and compare their measurement accuracy for process qualification.