New high performance second generation CMOS current conveyor

A new high performance second-generation CMOS \ncurrent conveyor architecture is presented. It is built using a \ndifferential flipped voltage follower as its input buffer stage and \na cascode current mirror as output stage. It is characterized by \nvery low output impedance. It provides gain independent high \nbandwidth when used to implement a programmable gain \nvoltage amplifier. Simulation and experimental results in AMI \n0.5µm CMOS technology are provided to validate the \ncharacteristics of the design.