A Study of the Trench Surface Inversi in the Trench CMOS Tec 0

This paper presents the results obtained in the study of the trench surface inversion problem for the CMOS technology using trench isolation. Special emphasis is put on the n-well CMOS tech- nology where the inversion problem is most severe. Potential distribu- tion along the trench surface is simulated using the SUPREM and GEMINI programs for different bias conditions, as well as for different impurity doping profiles and fixed charge densities (e,,). The results showed that Qss along the trench surface has to be maintained at 5 X 101o cm-2 if the substrate doping concentration remains at 6 X 1014 cm-3. Higher substrate doping, lower n-well bias, and more negative substrate bias will help prevent trench surface Inversion. p-well CMOS is more suitable for trench isolation due to the higher doping concentration inside the p-well. Experimental data showed that trench isolation gives no improvement in latch-up susceptibility when the trench surface is inverted. I. IKTRODUCTION