A Sub- μ A LDO With Analog Adaptive Enhancements for Scalable PSRR, Load Range, and Bandwidth Extension

This paper presents an ultra-low power low-dropout (LDO) regulator that employs three adaptive enhancements to dynamically optimize efficiency and performance across load conditions. Implemented in a GlobalFoundries 55 nm CMOS process and occupying 0.076 mm2, the regulator delivers 1.2V from a 1.8V supply, with functionality down to 1.37V. An adaptive gain boost (AGB) provides up to 25.2dB improvement in loop gain and more than 20 dB power-supply rejection ratio (PSRR) enhancement at high load. Adaptive Miller compensation (AMC) and adaptive headroom extension (AHE) expand the effective load range to 15 mA and extend the bandwidth by$2.5\times $to247.3kHz. The LDO achieves a quiescent current of 827 nA, sustaining >90% current efficiency at$10~\mu $A load and >99% at 15 mA, with stable operation in both capacitor-free and capacitor-loaded modes. Measured results across five chips and 200-run Monte Carlo simulations confirm robustness to variability. By combining ultra-low quiescent current, wide load scalability, and adaptive rejection, the proposed LDO provides a practical solution for duty-cycled biosensing and IoT systems requiring high efficiency during idle operation and strong performance under active load.