作者
Ehsan Elahi,Muhammad Farooq Khan,Muhammad Asim,M.S. Al-Assiri,Jamal Aziz,Muhammad Jamil,Zdeněk Sofer
摘要
The rapid growth of data-intensive AI workloads has highlighted the energy and latency limits of the von-Neumann architecture, in which the physical separation of memory and processing drives the so-called memory wall. Brain-inspired neuromorphic electronics addresses this bottleneck by co-locating storage and computation in artificial synapses whose conductance encodes the synaptic weight. Two-dimensional (2D) materials, including transition metal dichalcogenides (TMDCs), graphene, hexagonal boron nitride (h-BN), van der Waals (vdW) ferroelectrics, and layered chalcogen phosphates are widely explored as platforms for such synapses because of their atomic thickness, clean vdW interfaces, tunable defect/polarization landscapes, and compatibility with low-temperature hetero-integration. This review systematically explores the field along a single thread from synapses to hardware systems. We first summarize the neuromorphic computing paradigm and the neural network architectures (ANN, DNN, CNN, SNN) that have established the device-level requirements. We then discuss the key switching mechanisms in 2D synapses, including ion migration, charge trapping, ferroelectric polarization, phase/Mott transitions, and coupled photo-ionic/photo-ferroelectric effects and benchmark device performance against energy per event, ON/OFF ratio, endurance, retention, analog linearity, and variability. Particular attention is given to TMDC-based and TMDC-heterostructure synapses, which dominate recent demonstrations. Engineering strategies (wafer-scale growth, BEOL compatibility, reliability, sustainability) and the remaining challenges (variability, endurance, large-area uniformity, benchmarking beyond MNIST) are critically evaluated. We conclude with perspectives on adaptive robotics, secure on-device learning, and biohybrid interfaces, and outline a roadmap toward brain-scale, AI-grade 2D neuromorphic chips.