纳米尺度
材料科学
电极
薄膜晶体管
纳米技术
光电子学
薄膜
晶体管
电荷(物理)
电气工程
化学
电压
工程类
物理
图层(电子)
量子力学
物理化学
作者
Kelly Liang,Xin Xu,Yuchen Zhou,Xiao Wang,Calla M. McCulley,Liang Wang,Jaydeep P. Kulkarni,Ananth Dodabalapur
出处
期刊:Science Advances
[American Association for the Advancement of Science]
日期:2022-01-28
卷期号:8 (4)
被引量:13
标识
DOI:10.1126/sciadv.abm1154
摘要
To scale down thin-film transistor (TFT) channel lengths for accessing higher levels of speed and performance, a redesign of the basic device structure is necessary. With nanospike-shaped electrodes, field-emission effects can be used to assist charge injection from the electrodes in sub–200-nm channel length amorphous oxide and organic TFTs. These designs result in the formation of charge nanoribbons at low gate biases that greatly improve subthreshold and turn-off characteristics. A design paradigm in which the gate electric field can be less than the source-drain field is proposed and demonstrated. By combining small channel lengths and thick gate dielectrics, this approach is also shown to be a promising solution for boosting TFT performance through charge focusing and charge nanoribbon formation in flexible/printed electronics applications.
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