Heterostructure performance evaluation: A numerical simulation and analytical modeling of the ferroelectric pocket doped double gate tunnel FET

Abstract This paper presents a novel 2D analytical model for investigating the influence of the ferroelectric dielectric on the performance of pocket doped double gate tunnel FET. It takes into account the effect of the gate and drain voltages, the thickness of the gate insulator, the capacitance of the gate insulator, and source and drain depletions. The surface potential thus carefully obtained is utilized for calculating lateral electric field, drain current, gate‐to‐drain capacitance, and transconductance. As a result, it has been demonstrated that the result of our model with several device structures matches very well with the data obtained through the technology computer‐aided design (TCAD) simulation. In addition, it has also been shown that the proposed tunnel field‐effect transistors (TFET) structure, which incorporates the ferroelectric dielectric and SiGe/Si heterostructure, has the best ON current, ON/OFF ratio, transconductance, and cut‐off frequency ( f T ).