Feasibility Demonstration of GaN on Si Process for R&D and Manufacturing on Existing 200mm Si-Fab

This work reports the successful integration and processing of hundreds of GaN on Silicon wafer lots devoted to 100V Monolithic GaN power device within a standard 8-inch silicon fab primarily dedicated to BCD/CMOS technology production. By addressing key challenges related to gallium cross-contamination and equipment compatibility with thicker GaN on Si substrates, a comprehensive contamination management strategy was developed and implemented. This strategy includes dedicated equipment classification, backside wafer protection, optimized cleaning procedures for GaN etching tools, and rigorous monitoring using TXRF measurements. The approach enabled reliable, high-mechanical yield of GaN wafer device fabrication without impacting existing BCD/CMOS production lines, demonstrating the feasibility of coexisting GaN and silicon technologies in a shared manufacturing environment. This achievement paves the way for cost-effective scaling of GaN power device production within mainstream semiconductor fabs.