计算机科学
闪存
与非门
工艺变化
闪存文件系统
闪光灯(摄影)
计算机硬件
过程(计算)
块(置换群论)
计算机存储器
嵌入式系统
频道(广播)
半导体存储器
操作系统
计算机网络
数学
几何学
艺术
视觉艺术
作者
Yi Wang,Jiangfan Huang,Jing Chen,Rui Mao
标识
DOI:10.1109/tcad.2021.3091957
摘要
Three-dimensional (3D) flash memory is an emerging memory technology that enables a number of improvements to conventional planar NAND flash memory, including larger capacity, less program disturb, and lower access latency. Despite these advantages, 3D flash memory brings a number of new challenges. First, in 3D flash memory, NAND strings punch through multiple stacked layers to form the 3D infrastructure. Current etching process is unable to manufacture perfect channels with identical feature size. Second, with more stacked layers, the cell current in 3D flash memory is only 20% compared to planar flash memory, making it difficult to give a reliable sensing margin. These issues are affected by process variation, and they pose threats to the integrity of data stored in 3D flash memory. This article present PVSensing , a process-variation-aware space allocation strategy for open-channel SSD with 3D charge-trap flash memory. PVSensing is a novel hardware and file system interface that can transparently allocate physical space in the presence of process variation. PVSensing utilizes the rich functionalities provided by the system infrastructure of open-channel SSD to reduce the uncorrectable bit errors. Three reliability enhancement strategies (i.e., the adaptive creation of fault cubes, the physical block mining, and the live migration of write requests) are proposed. We demonstrate the viability of the proposed technique using a set of extensive experiments. Experimental results show that PVSensing can effectively reduce uncorrectable bit errors, and improve the reliability of critical data with negligible extra erase operations in comparison with representative schemes.
科研通智能强力驱动
Strongly Powered by AbleSci AI