通过硅通孔
纳米技术
材料科学
包装工程
碳纳米管
捆绑
三维集成电路
电子包装
包装设计
计算机科学
集成电路封装
硅
电气工程
电子工程
光电子学
机械工程
制造工程
工程类
复合材料
集成电路
作者
Muhammad Abdullah,Hing Wah Lee
标识
DOI:10.1016/j.mee.2024.112189
摘要
Through‑silicon via (TSV) is one of the most important features in 3D integrated circuit (IC) and 2.5D packaging. Both are within the advanced packaging topic for the digital and analog ICs aligned with More than Moore's paradigm. This article revisits the proposal and progress of carbon nanotubes (CNTs) TSV technology that potentially offers an improvement over the conventional Cu TSV. Today, CNTs TSV has never materialized in commercial products of 3D IC and 2.5D packaging. Compilation on notable numerical modeling works and matching them with related issues in fabrication suggest CNTs TSV technology is still in its infant stage. Although the simulation occasionally shows the advantages of CNTs TSV over Cu TSV in both digital and analog circuits, these results are prone to overestimation. One of the culprits is the number of CNT strands in the bundle which at best can be grown in the fab only ∼1% of the theoretically compact bundle used in the RLC and RLGC models. The direction where CNTs TSV is targeting in 3D IC and 2.5D packaging is not clear by several researchers. As the requirements for high-speed digital and high-frequency analog are different, they are important to be sorted out as an essence of this review to project the path of this CNTs TSV technology.
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