Distance Aware Compression for Low Latency High Bandwidth Interconnection Network

NoC(Network-on-Chip)s is an essential component of recent multi-core systems. When the number of wires available on a chip is limited, it is sometimes congested and increased la-tency can degrade the parallel application performance. The selective data compression has been proposed to mitigate such network congestion by compressing and decompressing packets based on the packet length and traffic situation. However, since the algorithm does not care the location of nodes, the compression and decompression are performed even when the packet is transferred between neighboring nodes. This paper proposes a distance aware (DA) compression mechanism to select whether the packet should be compressed by the distance to the destination. The packets to the nodes whose distance is larger than threshold level are compressed with a run-length loss-less compression at the sender's network interface and de-compressed at the receiver's network interface. Cycle level network simulation results show that the selective compression method achieves up to 45% bandwidth improve-ment with 1.26 times increase of the latency.