LDPC Codes with Low Error Floors and Efficient Encoders

This work presents low-density parity-check (LDPC) codes with low error floors, close to capacity performance and highly efficient encoders targeting high throughput applications such as free-space optical downlinks from low earth orbit (LEO) satellites to ground. We devise a code design strategy to find suitable protograph LDPC code ensembles and discuss an field-programmable gate array (FPGA) implementation of the obtained codes. In addition to having competitive decoding performance, the proposed codes have advantages in terms of encoding complexity. An FPGA prototype highlights significant improvements in resource utilization by a factor of around 10 compared to standardized DVB-S2 and CCSDS solutions.