Optimized reverse converters with multibit soft error correction support at 7nm technology

Residue number system (RNS) speeds up digital signal processing systems involving dominant addition and multiplication. Addition and multiplication are accelerated further and performed with a balanced performance on one-hot coded (OHC) residue digits. However, the high complexity of the RNS reverse converter (RC) may kill the performance gain. This paper proposes a high-speed and scalable RNS-RC for both regular and one-hot RNS. For redundant RNS (RRNS), an RRNS-RC is proposed, which based on majority-voting between OHC residue digits, corrects multibit soft errors occurring in a single residue channel. With pass-transistor logic and low-power FinFETs, the proposed RCs are optimized. The simulated RRNS-RC corrected 98.5% of soft errors, while consuming 7, 6.2 and 0.4% of the system's area, leakage power and dynamic power, respectively. As compared to the leading lookup table RC in the literature, RNS-RC exhibited 10.3X, 4.4X and 1.8X savings in area, average power, and delay, respectively.