A closed form expression for TSV-based on-chip spiral inductor

This paper presents a new architecture for on-chip spiral inductors, based on through silicon via (TSV) technology. A highly accurate closed form expression for the proposed TSV-based spiral inductor equivalent inductance is presented. This closed form is the first in literature. Moreover, this form is verified against a large number of EM simulations for different setups and shows excellent agreement with less than 5% error. According to the simulation results, the TSV-based spiral inductor exhibits better quality factor than a planar on-chip spiral inductor (120% improvement) and a 3D via-based spiral inductor (76% improvement) for identical inductance. Moreover, the self-resonance frequency of the proposed TSV-based 3D spiral inductor is 38% higher than the conventional 2D spiral inductor and 3% higher than the 3D via-based inductor. The proposed inductor occupies only 15% of the area of the conventional 2D planar spiral inductor and 60% of the area of 3D via-based spiral inductor for the same inductance and higher quality factor. This small area of the proposed inductor leads to significant reducing the cost of the radio frequency system on chip (RF-SoC).