A Cu/low-κ dual damascene interconnect for high performance and low cost integrated circuits
作者
Bin Zhao,D. Feiler,V. Ramanathan,Q.Z. Liu,M. Brongo,J. Y. Wu,H. Zhang,Johnny Kuei,David Young,James W.H. Brown,Cong Phat Vo,Weimin Xia,Cheuk Ying Chu,Jianchuan Zhou,Cuong H. Nguyen,L. Tsau,D. Dornish,L.E. Camilletti,Peng Ding,G. Lai
标识
DOI:10.1109/vlsit.1998.689186
摘要
Copper and a low dielectric constant (low-/spl kappa/) material have been successfully integrated in a dual damascene interconnect architecture. The low-/spl kappa/ material (/spl kappa/=2.2) was used as intra-level dielectric and inter-level dielectric, which has led to significant reduction in both intra-level and inter-level capacitance. In addition, low Cu wiring resistance and low Cu via resistance have been achieved in the dual damascene interconnect which offers process simplification and low cost.