材料科学
晶体管
光电子学
神经形态工程学
氧化铟锡
制作
极化(电化学)
纳米技术
铟
整改
氧化物
紫外线
异质结
炸薯条
作者
Jinhong Min,Yonghyun Albert Kwon,Hyunbin Kim,Jihyun Kim,Myeongjin Jung,Jaewon Heo,G. KIM,Vlastimil Mazánek,Zdeněk Sofer,In-Soo Kim,Jeong Ho Cho,Hyesung Park,Sang Min Won,J Y Kang
摘要
ABSTRACT The explosive growth of analog visual data magnifies the von Neumann bottleneck, where physically separated sensing and processing units incur prohibitive data movement. A near‐sensor architecture can mitigate this by carrying out low‐level processing (LLP) at or adjacent to the sensor, but practical hardware that unifies LLP with high‐level processing (HLP) on a scalable, singular platform based on standard fabrication processes remains hindered. Here, we report an operational design for a solution‐processed indium oxide‐based reconfigurable transistor that embeds alternative dual functionality in a single device: a visual sensor with an in‐sensor LLP/memory function and an electrical synaptic device for an HLP function. Terminal‐selective control of the ionic polarization yields two elemental behaviors: diode‐like rectification (>10 4 ) and transistor operation (apparent mobility = 37.5 cm 2 V − 1 s − 1 ), respectively. Notably, the drain pulses confine electrochemical doping–induced conductance changes to a narrow window, enabling passive in‐sensor LLP that experimentally enhances contrast in ultraviolet sensory signals. In contrast, the global gate pulses produce long‐term synaptic plasticity with a 7‐bit multi‐state and a dynamic range of ≈ 365, demonstrating that the same single‐gate platform can alternatively serve as a near‐sensor HLP unit.
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