转换器
功率(物理)
电子工程
工程类
页面布局
计算机科学
设计方法
功率半导体器件
功率MOSFET
电气工程
热的
集成电路布局
功率优化
电源模块
门驱动器
设计工具
MOSFET
电力电子
能量(信号处理)
功率密度
计算机辅助设计
功率损耗
优化设计
可靠性工程
作者
Huanghaohe Zou,Mafu Zhang,Saleh Farzamkia,Alex Q. Huang
标识
DOI:10.1109/ecce58356.2025.11259688
摘要
Top-Side-Cooling (TSC) packaged MOSFETs offer significant advantages in power density, simplified integration, and thermal management. However, their application in high-power converters (>5kW), such as residential energy storage systems or EV on-board chargers, requires paralleling multiple devices. This poses critical design challenges in achieving symmetrical current distribution, minimizing power and gate loop parasitics, and ensuring effective thermal spreading. To address these issues, this paper proposes a systematic PCB layout design and optimization methodology specifically for paralleled TSC packages. The methodology covers power loop optimization, gate driver layout, and detailed thermal analysis. A comprehensive performance comparison between different layout strategies is presented. Finally, the effectiveness of the proposed methodology is demonstrated with a prototype of an isolated single-stage bidirectional AC-DC converter that employs the optimal design, achieving a state-of-the-art power density of 75 W/in3.
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