A High Power Density Chip-on-Chip Gan-based Module with Ultra-Low Parasitic Inductance

In this paper, a 650V/120A rated half-bridge chip-on-chip GaN module has been proposed. The proposed module is based on a chip-on-chip structure, which allows the distributing decoupling capacitors integrated very close to each device. These distributing decoupling capacitors can help to equalize the dynamic turn-on current of parallel devices. Based on this structure, the parasitic inductance including the power terminal of the proposed GaN module is only 2.1 nH. The effect of parasitic inductance on parallel devices is analyzed and optimized. By double-sided cooling, the module shows good thermal performance.