材料科学
光电子学
电子线路
电子工程
MOSFET
碳化硅
半导体器件建模
集成电路
等效电路
电气工程
场效应晶体管
串扰
香料
逻辑门
电力电子
电容
电压
晶体管
CMOS芯片
数码产品
作者
Ziheng Yuan,Helong Li,Man Zhang,Zhiqing Yang,Haoran Wang,Xiongfei Wang,Lijian Ding
标识
DOI:10.1109/tpel.2026.3701449
摘要
SiC MOSFETs suffer from serious crosstalk issues due to their fast-switching speed and low threshold voltage, which threatens the device's reliability. It is commonly believed that the crosstalk voltage is caused by the rapid change in the drain-source voltage during the Miller plateau stage coupled with the gate-drain capacitance (Cgd). However, this paper reveals that the crosstalk voltage can also be induced by the small variation in the body diode voltage drop during the current commutation stage, which is commonly overlooked. This phenomenon is attributed to the pronounced increase inCgdas the drain-gate voltage (Vdg) approaches zero and becomes negative. The underlying physical mechanism of the nonlinearity ofCgdover the entireVdgrange is elucidated. Based on these findings, a two-stagedv/dt-dependent crosstalk model incorporating both the current commutation stage and the Miller plateau stage is proposed. The proposed model is experimentally verified using SiC MOSFETs with Kelvin-source connection in a half-bridge configuration. The findings of this article provide new insights into the root cause of crosstalk behavior and contribute to the design of crosstalk mitigation strategies.
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