计算机科学
现场可编程门阵列
量化(信号处理)
高效能源利用
钥匙(锁)
算法
图形
修剪
能量(信号处理)
能源消耗
并行计算
计算机工程
查阅表格
建筑
NIST公司
基质(化学分析)
硬件加速
理论计算机科学
实时计算
嵌入式系统
计算科学
低能
单精度浮点格式
乘数(经济学)
图论
作者
Shizhen Huang,Jiaren Peng,Yanxiang Zhu,Han Bao
标识
DOI:10.1109/les.2026.3663689
摘要
GCN accelerators often adopt pruning or quantization to reduce resource demands, yet energy efficiency remains a key challenge on FPGA platforms due to DSP-based matrix multiplications. Existing DSP-free approximate multipliers fail to strike a good trade-off between precision and efficiency. To overcome these, this letter presents the first FPGA-based FP8 approximate GCN accelerator, enabling both low precision loss and high energy efficiency. The proposed architecture is deployed on a Kintex-7 K325T FPGA, demonstrating that the accuracy loss of the approximate FP8 GCN model remains within 3%. While achieving average performance improvements of 12.9× (0.7-44.0×) and average energy savings of 169× (1.01-1010×) over CPUs, GPUs, and prior edge-FPGA-based accelerators.
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