Threshold Voltage Modelling of Linearly Graded Binary Metal Alloy Gate Electrode with DP MOSFET

Two-dimensional (2D) analytical threshold voltage model for Linearly Graded Binary Metal Alloy (LGBMA) gate electrode with Dielectric Pocket (DP) Metal Oxide Semiconductor (MOSFET) has been developed by solving 2-D Poisson’s equation using evanescent mode analysis technique. In this proposed model, first time the idea of work function engineering is incorporated for DP MOSFET to bring an improvement over different short channel effects (SCEs). In present paper, the expressions for surface potential and threshold voltage are derived along with drain current, transconductance and drain conductance. Moreover, this model also predicts the variations of different SCEs like threshold voltage roll off, Drain-induced Barrier Lowering (DIBL) and sub-threshold swing along the channel length correctly. All analytical results are verified by ATLAS-2D simulator.